This invention relates to an apparatus for receiving and detecting a vestigial sideband signal. More specifically, this invention relates to a device for digitally detecting and removing a pilot frequency while digitally down-converting an intermediate frequency signal to baseband.
The Advanced Television Systems Committee (ATSC) has prepared a Digital Television System (DTS) standard. The DTS standard outlines various system characteristics of the Advanced Television (ATV) system proposed for use in the U.S., and Annex D in particular specifies the Radio Frequency (RF) transmission subsystem for the DTS standard. The RF transmission subsystem performs amplitude and vestigial sideband modulation (VSB) in two modes: a terrestrial mode (8-level VSB, or simply 8 VSB)) and a high data rate mode (16-level VSB, or simply 16 VSB). For explanatory purposes, the following discussion focuses on the 8 VSB standard, although the invention is applicable to any VSB signal having a pilot tone.
Turning now to the figures, FIG. 1 shows one embodiment of an ATV transmitter 100. The ATV transmitter comprises a data randomizer 102, a Reed-Solomon encoder 104, an interleaver 106, a trellis encoder 108, a sync word insertion module 110, a pilot insertion module 112, a VSB modulator 114, and a radio-frequency (RF) up-converter 116. The ATV transmitter 100 receives a digital audiovisual signal, e.g. an MPEG bitstream, in the form of 188 byte data packets. The first byte is a synchronization byte, and the remaining 187 bytes are payload data.
Data randomizer 102 drops the synchronization byte and changes each remaining byte value according to a known pseudo-random number pattern in order to eliminate repetitious patterns and thereby provide the data with a completely random noise-like character. Reed-Solomon encoder 104 encodes the 187 randomized bytes to add 20 redundancy bytes to enable future error correction of up to 10 byte errors. Interleaver 106 re-orders the encoded bytes to intermix the byes from different packets and thereby provide resistance to burst errors (since all the bytes for a given packet are no longer concentrated in a short time interval). Trellis encoder 108 provides further encoding and modulation. At the trellis encoder output, 328 symbols are produced for every 187 input bytes. Sync word insertion module 110 prepends a 4-symbol segment synchronization word to each group of 328 symbols to form a 332 symbol data segment, and further inserts a field synchronization segment for every set of 312 data segments to form a 313 segment data field. Pilot insertion module 112 provides a DC offset to all the symbols. The DC offset will appear as a carrier, or xe2x80x9cpilotxe2x80x9d, tone in the modulated signal. VSB modulator 114 modulates the symbols from module 112 onto an intermediate frequency (IF) carrier in 8-level amplitude-modulated vestigial-sideband form, and RF up-converter 116 moves the IF signal into the assigned frequency channel, and amplifies and filters the output signal before supplying it to a transmit antenna.
FIG. 2 shows one embodiment of an ATV receiver 200 that comprises tuner 202, IF module 204, NTSC rejection filter 206, equalizer 208, phase tracker 210, trellis decoder 212, de-interleaver 214, Reed-Solomon decoder 216, and de-randomizer 218. Tuner 202 receives all the signals in a designated frequency band from the receiver antenna, and downmixes a selected channel to IF (e.g. 44 MHz). IF module 204 filters out undesired adjacent channels using a square-root raised-cosine bandpass filter, and locks on to the carrier tone using a narrowband frequency-and-phase locked loop (FPLL). The output of module 204 is a synchronously-detected baseband signal.
During the transition period from the National Television Standards Committee (NTSC) standard to the DTS standard, many ATV transmissions will take place in channels which are shared by NTSC transmissions in neighboring broadcast regions. It is necessary that the receiver possess some immunity to these NTSC transmissions. Accordingly, NTSC rejection filter 206 is a xe2x80x9ccombxe2x80x9d filter with nulls near the standard NTSC luminance, color, and audio carrier frequencies to screen out interference from NTSC transmissions. Equalizer 208 is a moving-window adaptive equalizer that operates to remove any linear distortions (e.g. spectrum tilt, multi-path echo) from the received signal and thereby maximize the xe2x80x9ceye openingsxe2x80x9d in the equalized signal. Phase tracker 210 is a wide-band first-order tracking loop that removes any remaining phase noise not tracked by the FPLL carrier recovery loop. The phase tracker 210 operates independently of the preceding modules.
Trellis decoder 212 operates according to the Viterbi algorithm to demodulate the data. De-interleaver 214 reverses the operation of interleaver 106 to gather the dispersed bytes from Reed-Solomon encoded packets back together, and Reed-Solomon decoder 216 decodes the packets, providing error correction as needed. The de-randomizer then reverses the operation of randomizer 102 to reproduce the original data packets. Further details are available in Annex D of the ATSC DTS Standard, and the Guide to the Use of the ATSC Digital Television Standard, of which pages 105-126 are hereby incorporated by reference.
Receivers for ATV transmissions will be mass-manufactured and sold to the public as part of televisions and other electronics. It would benefit consumers if receivers could provide high performance with minimal costs. Systems built from modular components generally benefit from reduced costs due to re-usability of existing components in new designs, but the cost savings are even more realizable when the costs of the individual high-performance modules are reduced.
Accordingly, there is disclosed herein an inexpensive synchronous detection module for a sideband signal receiver. In one embodiment, the disclosed synchronous detection module provides for flexibility in design of the tuner since the detection module is adaptable to detection of upper or lower sideband signals. The embodiment includes an analog-to-digital converter, a Hilbert transform filter, a sideband selection switch, a complex multiplier, a carrier recovery loop, a matched filter, and a decimator. The analog-to-digital converter oversamples an intermediate frequency (IF) signal from the tuner, and the Hilbert transform filter generates a Hilbert transform of the digital IF signal. An analytic IF signal can be generated from the digital IF signal by multiplying the Hilbert transform of the digital IF signal by j(=sqrt(xe2x88x921)), and adding the resulting imaginary-valued signal to the digital IF signal. The sideband selection switch can xe2x80x9cflipxe2x80x9d the analytic IF signal by inverting the imaginary-valued signal. The complex multiplier multiplies the analytic IF signal by a complex-value sinusoid to shift the analytic IF signal to baseband. The resulting analytic baseband signal is match filtered and decimated to form a baseband double sideband signal with one sample per symbol period. The carrier recovery loop operates on the imaginary part of the analytic baseband signal to generate the complex-value sinusoid that shifts the analytic IF signal to baseband.
The present invention further contemplates a method for demodulating a sideband signal. The method comprises: (i) oversampling an intermediate frequency (IF) signal to obtain a digital IF signal; (ii) filtering the digital IF signal to obtain an analytic IF signal; (iii) multiplying the analytic IF signal by a complex frequency signal to obtain an analytic baseband signal; and (iv) generating the complex frequency signal from an imaginary part of the analytic baseband signal to minimize energy of this imaginary part. The method may further include inverting an imaginary part of the analytic IF signal before multiplying the analytic signal by the complex frequency signal.
The disclosed embodiments of the present invention advantageously implement the carrier recovery loop as a phase-lock loop (PLL) with a digital frequency sweep rather than the more complex frequency and phase lock loop (FPLL). This avoids the presence of nonlinearities in the feedback loop, thereby ensuring robust loop behavior. The disclosed embodiments are advantageously able to receive both upper and lower sideband signals without any redesign, and the disclosed digital sweep method is advantageously easy to implement.